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C8051F380/1/2/3/4/5/6/7/C
SFR Definition 20.3. XBR2: Port I/O Crossbar Register 2
Bit
7
6
5
4
3
2
1
0
Name
SMB1E
URT1E
Type
Reset
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
SFR Address = 0xE3; SFR Page = All Pages
Bit Name
Function
7:2
1
0
Reserved
SMB1E
URT1E
Must write 000000b
SMBus1 I/O Enable.
0: SMBus1 I/O unavailable at Port pins.
1: SMBus1 I/O routed to Port pins.
UART1 I/OEnable.
0: UART1 I/O unavailable at Port pins.
1: UART1 TX1, RX1 routed to Port pins.
20.3. General Purpose Port I/O
Port pins that remain unassigned by the Crossbar and are not used by analog peripherals can be used for
general purpose I/O. Ports 3-0 are accessed through corresponding special function registers (SFRs) that
are both byte addressable and bit addressable. Port 4 (C8051F380/2/4/6 only) uses an SFR which is
byte-addressable. When writing to a Port, the value written to the SFR is latched to maintain the output
data value at each pin. When reading, the logic levels of the Port's input pins are returned regardless of the
XBRn settings (i.e., even when the pin is assigned to another signal by the Crossbar, the Port register can
always read its corresponding Port I/O pin). The exception to this is the execution of the read-modify-write
instructions. The read-modify-write instructions when operating on a Port SFR are the following: ANL,
ORL, XRL, JBC, CPL, INC, DEC, DJNZ and MOV, CLR or SETB, when the destination is an individual bit
in a Port SFR. For these instructions, the value of the register (not the pin) is read, modified, and written
back to the SFR.
Rev. 1.4
161
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